1. Field of the Invention
The present invention relates to an imaging device capable of suppressing variations between array columns consisting of pixel circuits constituting an image sensor.
2. Description of Related Art
FIG. 6 is a circuit diagram showing a schematic configuration of a conventional imaging device. The conventional imaging device is described in “128 Mb/s Multiport CMOS Binary Active-Pixel Image Sensor” by Roger A. Panicacci, et. al., ISSCC96 SESSION 6, PAPER TP 6.5 (pp. 80–81 and 372–373), a part of which is shown in this figure. In FIG. 6, the reference numeral 101 designates a unit pixel circuit constituting a pixel array with other unit pixel circuits 101. The reference numeral 102 designates a reset switch for resetting a photodiode 103 of the unit pixel circuit 101; 103 designates the photodiode for generating a potential corresponding to an amount of input light; 104 designates a source follower transistor for reading and amplifying the output potential of the photodiode 103; and 105 designates an output selecting transistor for the output operation of the unit pixel circuit 101 selected by an external input signal. The unit pixel circuit 101 consists of the reset switch 102, photodiode 103, source follower transistor 104, and output selecting transistor 105.
The reference numeral 106 designates a column memory provided for each array column of the pixel array. For the sake of simplicity, only a pair of unit pixel circuit 101 and column memory 106 is shown. The reference numeral 107 designates a bias transistor for supplying the source follower transistor 104 with a constant current when reading the output potential from the unit pixel circuit 101 to the column memory 106; 108 designates a sampling transistor for leading the output potential of the source follower transistor 104 to a clamp capacitor 109; 109 designates the clamp capacitor for clamping the output potential of the source follower transistor 104; 110 designates a clamp transistor for clamping the output side of the clamp capacitor 109; and 111 designates an output transistor for generating pixel data from the column memory 106. The column memory 106 consists of the bias transistor 107, sampling transistor 108, clamp capacitor 109, clamp transistor 110, and output transistor 111. The reference numeral 112 designates an input transistor of a current-mirror circuit for determining the output current of the bias transistor 107; and 113 designates an output line for connecting the unit pixel circuit 101 to the column memory 106.
Next, the operation of the conventional imaging device will be described.
First, the reset switch 102 resets the photodiode 103. Receiving the incident light, the photodiode 103 stores electric charges, and outputs a potential corresponding to an amount of the incident light. The potential is applied to the gate of the source follower transistor 104. After applying the light to the photodiode 103 for a fixed time period to store the electric charges, a controller (not shown) supplies the gate of the output selecting transistor 105 with a signal for selecting the unit pixel circuit 101. Thus, a circuit is established between the source follower transistor 104 and the bias transistor 107 so that the signal level of the unit pixel circuit 101 is supplied to the column memory 106 via the output line 113.
The output line 113 is provided with a signal level equal to the potential output from the photodiode 103 minus the threshold voltage of the source follower transistor 104 in response to the incident light. The signal level applied to the output line 113 is fed to the column memory 106. In the column memory 106, the sampling transistor 108 controls its sampling timing by switching, thereby supplying the signal level to the input side of the clamp capacitor 109. In this case, the output side of the clamp capacitor 109 is fixed at the clamp potential by the output of the clamp transistor 110. Subsequently, the output of the clamp transistor 110 is turned off to bring the output side of the clamp capacitor 109 into a floating state. Then, the photodiode 103 is reset again. In this case, the reset level, which is equal to the potential output of the photodiode 103 minus the threshold voltage value of the source follower transistor 104, is supplied to the input side of the clamp capacitor 109 via the output line 113. Thus, the potential at the output side of the clamp capacitor 109 that is held at the fixed clamp potential is increased by the potential given by the following expression.(reset level of photodiode 103)−(signal level of photodiode 103)The output transistor 111 carries out predetermined processing of the potential increased from the clamp potential, and outputs the result from the column memory 106 as its pixel output.
Using such correlated double sampling, the conventional imaging device compares the signal level with the reset level output from the same pixel, thereby suppressing fixed pattern noise resulting from the variations in the threshold voltage values of the transistors constituting the unit pixel circuit 101 and the like.
With the foregoing configuration, the conventional imaging device can suppress the fixed pattern noise resulting from the variations in the threshold voltages of the transistors constituting the unit pixel circuit 101. However, it has a problem of generating fixed vertical string-like pattern noise in an image on the imaging device if the bias transistor 107 in the column memory 106, which is disposed in each column of the array consisting of the unit pixel circuits 101, has variations, and hence the bias current has variations between the array columns.
This will be described in more detail. The fixed pattern noise appearing in the image picked up arises from the variations in the output potential between the pixel circuits, which is affected by the variations in the threshold values of the source follower transistors 104 and bias transistors 107. The noise arising from the variations in the characteristics of the source follower transistors 104 appears at random in the image. In contrast, the noise arising from the variations in the characteristics of the bias transistors 107 appears as the string-like noise because it brings about the variations in the array columns. From the characteristics of the human eye, the visual perception for the string-like noise is about three times more acute than for the random noise. Accordingly, the variations in the bias transistors 107 that generate the string-like noise must be reduced about ⅓ or less of the variations in the source follower transistors 104 that produce the random noise. However, the variations in the bias transistors 107 and source follower transistors 104 are nearly the same, because they are formed in the same device. In addition, the bias transistors 107 constitute a current-mirror circuit in the circuit configuration, and their characteristic variations have equal to or greater effect on the potentials to be sampled than the characteristic variations in the source follower transistors 104. As a result, the configuration of the conventional imaging device has a problem of making it difficult to suppress the string-like noise.